Field of the Invention
The present invention relates to a memory device using semiconductors, particularly bipolar type semiconductors, more particularly a semiconductor memory device having a pulse width control circuit for preventing erroneous operation in a write circuit.
A semiconductor memory device usually cannot effect a write operation unless the pulse width of the write enable signal is greater than a certain magnitude. One of the exceptions is just after a change of address. At such times, the write operation may be effected by even a write enable signal having a relatively short pulse width. Consequently, however, an erroneous write operation may be caused just after a change of address due to noise.
To prevent such erroneous write operations, Japanese Unexamined Patent Publication (Kokai) No. 53-114651 discloses a pulse width control circuit permitting the passage of a write enable signal having a pulse width greater than a predetermined pulse width and inhibiting the passage of that having less than the predetermined pulse width.
This pulse width control circuit can prevent erroneous write operations due to noise. However, the circuit requires a certain processing time and a minimum pulse width of the write enable signal to effect the write operation. As a result, the write cycle time is disadvantageously increased.